{
  "tag": "F2PHTH",
  "kind": "model",
  "slug": "boolean-circuit",
  "name": "Boolean circuit",
  "aliases": [
    "logic circuit",
    "combinational circuit"
  ],
  "area": "foundations/models-of-computation",
  "level": "core",
  "summary": "Directed acyclic graph of AND, OR and NOT gates; the non-uniform model for size and depth.",
  "prereqs": [
    "asymptotic-notation",
    "logarithms"
  ],
  "sources": [
    {
      "book": "isbn:9780521424264",
      "title": "Sanjeev Arora and Boaz Barak, Computational Complexity: A Modern Approach",
      "locator": "Chapter 6, Boolean circuits"
    },
    {
      "book": "isbn:9781133187790",
      "title": "Michael Sipser, Introduction to the Theory of Computation, third edition",
      "locator": "Section 9.3, Circuit complexity"
    },
    {
      "paper": "Claude E. Shannon, The synthesis of two-terminal switching circuits, Bell System Technical Journal 28(1) (1949), pages 59 to 98"
    },
    {
      "paper": "Philip M. Spira, On time-hardware complexity tradeoffs for Boolean functions, Proceedings of the 4th Hawaii Symposium on System Sciences, 1971"
    },
    {
      "paper": "David A. Barrington, Bounded-width polynomial-size branching programs recognize exactly those languages in NC1, Journal of Computer and System Sciences 38(1) (1989)"
    },
    {
      "paper": "Johan Hastad, Almost optimal lower bounds for small depth circuits, STOC 1986"
    },
    {
      "paper": "Merrick Furst, James B. Saxe and Michael Sipser, Parity, circuits, and the polynomial-time hierarchy, Mathematical Systems Theory 17 (1984)"
    },
    {
      "paper": "O. B. Lupanov, On a method of circuit synthesis, Izvestiya VUZ, Radiofizika 1 (1958)"
    }
  ],
  "see_also": [
    "non-uniform-computation",
    "p-poly",
    "circuit-complexity",
    "circuit-value-problem",
    "circuit-sat",
    "nc",
    "ac0",
    "counting-argument"
  ],
  "url": "https://algorithm.tamnd.com/boolean-circuit/",
  "path": "nodes/foundations/models-of-computation/boolean-circuit",
  "status": {
    "slug": "boolean-circuit",
    "h": {
      "level": 0,
      "max": 3,
      "label": "H0",
      "name": "no proof",
      "next": [
        "add a proof in proofs/ (06.5)"
      ]
    },
    "l": {
      "level": 0,
      "max": 4,
      "label": "L0",
      "name": "no Lean part",
      "next": [
        "name a Lean module in the lean field (07)"
      ]
    },
    "i": {},
    "v": {
      "level": 0,
      "max": 3,
      "label": "V0",
      "name": "none",
      "next": [
        "add viz/scene.ts or a figure (10)"
      ]
    },
    "w": {
      "level": 4,
      "max": 5,
      "label": "W4",
      "name": "complete",
      "next": [
        "a review of the text: no review record reviews/F2PHTH/text.yaml"
      ]
    }
  },
  "scene": false
}